Class Note

Lecture	Title
0	Introduction
1	Pipelining & Retiming
2	Unfolding Transformation
3-1	Folding
3-2	Scheduling
	2004SpringMidterm
4	Case study – Programmable DSP
5	Systolic
6	Algo. strength reduction
7	Case study – FFT processor
7-1	DFT
8	Bit-level arithmetic architecture
9	Redundant arithmetic
10	Numerical strength reduction
11	Distributed arithmetic
App	Register organization for media processing