SoC Design Lab
Spring, 2004 |
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Announcements |
[Announced on June 25] SoC Design Lab 成績公佈,對成績有疑問的同學請在星期一4:00PM後找老師。 [Announced on May 14]
[Announced on May 13] Project Demo時間為6/2和6/3號,一天八組,請到工四412找助教登記Demo時刻。 Project Presentation時間為6/9和6/16號原上課時段,請到工四412找助教登記順序。 [Announced on May 11] |
Course
Information
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《Overview》
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《Prerequisites》Cell-based VLSI DesignC/C++, Assembly Synthesizable HDL Coding Skills |
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《Instructor》Prof. Tian-Sheuan Chang (張添烜)ED406, (03)5731925 E-mail: tschang@twins.ee.nctu.edu.tw |
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《Lecture Hours》17:40--18:30 Tue. & 10:10--12:00 Wed. (2Y, 3CD) New!!10:10--12:00 Wed. & 15:40--16:30 Fri. (3CD, 5G) Original. ED022 《Lab Hours》18:30--21:20 Tue. (2IJK)ED414 |
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《Schedule and Grading》Schedule and Grading is updated on Feb. 19 PDF | HTML |
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《TAs》
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Handouts |
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Labs
& Projects
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《Labs》
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《Projects》
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Related Resources |
《Course Forum》Questions? Problems?Check the SoC Design Lab Forum |
《Instrument Registration》Register for the instruments(coming soon) |
《ARM Related》ARM Architecture Reference Manual (ver. Jane 2000, E)To complete your homework, you may need the information described in Part A of this document. Proprietary Notice: This document is owned by ARM Limited and you can find one copy in ARM ADS CD. For convenience, we put it here. AMBA Specification Steve Furber, "ARM System-on-chip Architecture," Addison-Wesley, 2000 |
《Algorithms and Architectures》Keshab K. Parhi,"VLSI Digital Signal Processing Systems, Design and Implementation," John Wiely & Sons, 1999 |
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VLSI Signal Processing Lab Phone:+886-3-5712121 ext. 54225 新竹市大學路1001號 國立交通大學電子研究所 工程四館 412室 ED412R Institute of Electronics, National Chiao Tung University 1001 TA HSUEH ROAD, HSINCHU, TAIWAN 30010, R.O.C If you have any questions or comments, please email to us. |
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