Sep. 2001 |
《Prerequisites》
《Course Contents》
《Instructor》
Prof. Chein-Wei Jen (任建葳 教授)
ED406, (03)5731925 E-mail: cwjen@twins.ee.nctu.edu.tw
《Lectures》
Mon. (10:10~12:00) and Wed. (9:00~9:50) in ED220
《Course TA》
Kun-Bin Lee (李坤儐) Jih Yiing Lin (林季穎)
《Lab TAs》
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Chapter 2. ARM Processor Core and Instruction Sets (2001.10.15) Chapter 3. VCI Interface, AMBA Bus and Platform-based Design (2001.10.30) Chapter 4. IP Core Design, Modeling and Verification (2001.11.10) Chapter 5. Algorithm and Architecture Exploration in IP Core Design (2001.12.10) |
Introduction to Lab and Homework Test BMP file 1 (9.2MB): motorcycle (2048x1536) original source: http://www.csie.nctu.edu.tw/~hhchen/index783.html Test BMP file 2 (1.4MB): station (800x600) 《Tentative Schedule》
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《ARM》 ARM Architecture Reference Manual (ver. Jane 2000, E) To complete your homework, you may need the information described in Part A of this document. Proprietary Notice: This document is owned by ARM Limited and you can find one copy in ARM ADS CD. For convenience shake, we put it here. AMBA Specification 《JPEG》 JPEG website JPEG related information: Digital Image Processing, Rafael C. Gonzalez and Richard E. Woods, 1993. 《IP Authoring》 IP measurement for reusability: OpenMORE Reuse guides: Reuse Methodology Manual for System-on-A-Chip Designs, by Michael Keating and Pierre Bricaud, 2ed. 1999 FPGA Reuse Field Guide |
Phone:+886-3-5712121 EXT: 54225 新竹市大學路1001號 國立交通大學電子研究所 工程四館 412室 If you have any questions or comments, please email to us. |